Volume 15, Issue 1 (Journal of Control, V.15, N.1 Spring 2021)
JoC 2021, 15(1): 113-125 |
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Alaei M, Yazdanpanah F. A High Reliable Multicast Routing Algorithm for 2D and 3D Mesh-based NoCs with Fuzzy-based Load Control. JoC 2021; 15 (1) :113-125
URL: http://joc.kntu.ac.ir/article-1-670-en.html
URL: http://joc.kntu.ac.ir/article-1-670-en.html
1- Vali-e-Asr University of Rafsanjan
Abstract: (6510 Views)
Nowadays, the technology of digital systems is moving towards increasing the number of processing elements on a chip, which requires scalable and efficient communication infrastructure to achieve higher performance. Network-on-chip (NoC) is a high-performance solution for dealing with many on-chip communication challenges, such as the wiring complexity and the integration of a large number of transistors on a chip. In NoC, communication protocols, routing algorithms and topologies play important roles in the overall system performance. In this paper, a multicast adaptive routing algorithm with fuzzy-based load control for mesh-based NoCs is proposed. This algorithm, due to the non-uniform production and distribution of unicast and multicast packets, prevents dead-locks and live-locks dynamically by the fuzzy control system. The proposed algorithm leads to efficient congestion management, latency reduction and improvement in network throughput and reliability, and even reduction in power consumption. The results of evaluations and comparison with recent multicast routing algorithms demonstrate that the proposed algorithm provides higher reliability and better performance for both 2D and 3D NoCs with mesh topology, than the other works.
Type of Article: Research paper |
Subject:
Special
Received: 2019/05/17 | Accepted: 2020/06/5 | ePublished ahead of print: 2020/06/27 | Published: 2021/05/22
Received: 2019/05/17 | Accepted: 2020/06/5 | ePublished ahead of print: 2020/06/27 | Published: 2021/05/22
References
1. [1] P. Lotfi-Kamran, A.M. Rahmani, M. Daneshtalab, A. Afzali-Kusha, Z. Navabi, "EDXY - A low cost congestion-aware routing algorithm for network-on-chips," Journal of Systems Architecture, vol. 56, Issue 7, pp. 256-264, 2010. [DOI:10.1016/j.sysarc.2010.05.002]
2. [2] H. Naghibi Jouybari, K. Mohammadi, "A Low Overhead, Fault Tolerant and Congestion Aware Routing Algorithm for 3D Mesh-Based Network-on-Chips," Microprocessor and Microsystems, vol. 38, Issue 8, pp. 991-999, 2014. [DOI:10.1016/j.micpro.2014.09.005]
3. [3] C. Wang, A. W. Hu, N. Bagherzadeh, "Scalable Load Balancing Congestion-Aware Network-on-Chip Router Architecture", Computer and System Sciences, vol. 79, no. 4, pp. 421-439, 2013. [DOI:10.1016/j.jcss.2012.09.007]
4. [4] M. Ebrahimi, M. Daneshtalab, P. Liljeberg, J. Plosila, H. Tenhunen, "Efficient Congestion-Aware Selection Method for On-chip Networks", 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCo-SoC), pp. 1-4, 2011. [DOI:10.1109/ReCoSoC.2011.5981543]
5. [5] F. Farahnakian, M. Ebrahimi, M. Daneshtalab, P. Liljeberg, J. Plosila, "Adaptive Reinforcement Learning Method for Networks-on-Chip", International Conference on Embedded Computer Systems (SAMOS), pp. 236-243, 2012. [DOI:10.1109/SAMOS.2012.6404180]
6. [6] M. Ebrahimi, M. Daneshtalab, P. Liljeberg, H. Tenhunen, "Performance Evaluation of Unicast and Multicast Communication in Three-Dimensional Mesh Architectures," 15th CSI International Symposium on Computer Architecture and Digital Systems (CADS), pp. 161-162, 2010. [DOI:10.1109/CADS.2010.5623591]
7. [7] K. Somasundaram, J. Plosila, N. Viswanathan, "Deadlock Free Routing Algorithm for Minimizing Congestion in a Hamiltonian Connected Recursive 3D-NoCs", Micro-electronics, vol. 45, no. 8, pp. 989-1000, 2014. [DOI:10.1016/j.mejo.2014.05.003]
8. [8] M. Ebrahimi, M. Daneshtalab, P. Liljeberg, H. Tenhunen, "HAMUM - A Novel Routing Protocol for Unicast and Multicast Traffic in MPSoCs," 18th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP), pp. 525 -532, 2010. [DOI:10.1109/PDP.2010.81]
9. [9] P. Bahrebar, D. Stroobandt, "The Hamiltonian-based Odd-even Turn Model for Maximally Adaptive Routing in 2D Mesh Networks-on-Chip", Computer and Electrical Engineering, vol. 45, pp. 386-401, 2015. [DOI:10.1016/j.compeleceng.2014.12.009]
10. [10] W.C. Tsai, K.C. Chu, Y.H. Hu, S. J. Chen, "Non-minimal, Turn-model Based NoC Routing", Microprocessors and Microsystems, vol. 37, Issue 8, pp.899-914, 2012. [DOI:10.1016/j.micpro.2012.08.002]
11. [11] M. Daneshtalab, M. Ebrahimi, P. Liljeberg, J. Plosila, H. Tenhunen, "Memory Efficient On-chip Network with Adaptive Interfaces", IEEE Transactions on Computer-Aided Design, vol. 31, no. 1, pp. 146-159, 2012. [DOI:10.1109/TCAD.2011.2160348]
12. [12] M. Ebrahimi, H. Tenhunen, M. Dehyadegari "Fuzzy-based Adaptive Routing Algorithm for Networks-on-Chip", Systems Architectures, vol. 59, no. 7, pp. 516-527, 2013,. [DOI:10.1016/j.sysarc.2013.03.006]
13. [13] K. Tatas, C. Chrysostomou, "Hardware Implementation of Dynamic Fuzzy Logic Based Routing in Network-on-Chip," Microprocessors and Microsystems, vol. 52, pp. 80-88, 2017. [DOI:10.1016/j.micpro.2017.05.008]
14. [14] H. Phan, X. Tran, "Fuzzy-logic Based Low Power Solution for Network-on-Chip Architectures," International Conference on Advanced Technologies for Communications (ATC), pp. 334-338, 2016. [DOI:10.1109/ATC.2016.7764801]
15. [15] K.J. Lee, C.Y. Chang, H.Y. Yang, "An Efficient Deadlock-Free Multicast Routing Algorithm for Mesh-Based Networks-on-Chip," International Symposium onVLSI Design, Automation, and Test (VLSI-DAT), pp. 1-4, 2013.
16. [16] A. Karkar, T. Mak, K. Tong, A. Yakovlev, "A Survey of Emerging Interconnects for On-Chip Efficient Multicast and Broadcast in Many-Cores", IEEE Circuits and Systems Magazine, vol. 16, no. 1, pp. 58-72, 2016. [DOI:10.1109/MCAS.2015.2510199]
17. [17] Z. Wang, H. Gu, Y. Yang, H. Zhang, Y. Chen, "An Adaptive Partition-Based Multicast Routing Scheme for Mesh-Based Networks-on-Chip," Computers and Electrical Engineering, vol. 51, pp. 235-251, 2016. [DOI:10.1016/j.compeleceng.2016.01.021]
18. [18] C. Wu, K. Lee, A.P. Su, "A Hybrid Multicast Routing Approach with Enhanced Methods for Mesh-Based Networks-on-Chip," IEEE Trans-actions on Computers, vol. 67, no. 9, pp. 1231-1245, 2018. [DOI:10.1109/TC.2018.2813394]
19. [19] M. Ebrahimi, M. Daneshtalab, J. Plosila, "Fault-tolerant Routing Algorithm for 3D NoC Using Hamiltonian Path Strategy," Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1601-1604, 2013. [DOI:10.7873/DATE.2013.325]
20. [20] N. K. Meena, H.K. Kapoor, S. Chakraborty, "A New Recursive Partitioning Multicast Routing Algorithm for 3D Network-on-Chip," 18th International Symposium on VLSI Design and Test, pp. 1-6, 2014. [DOI:10.1109/ISVDAT.2014.6881040]
21. [21] T. H. Vu, A.B. Abdallah, "Low-Latency K-Means Based Multicast Routing Algorithm and Architecture for Three Dimensional Spiking Neuromorphic Chips," IEEE International Conference on Big Data and Smart Computing (BigComp), pp. 1-8, 2019.
22. [22] L.Wei, Zhou, "An Equilibrium Partitioning Method for Multicast Traffic in 3D NoC Architecture," IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 128-133, 2015. [DOI:10.1109/VLSI-SoC.2015.7314404]
23. [23] M. Ebrahimi, M. Daneshtalab, P. Liljeberg, J. Plosila, J. Flich, H. Tenhunen, "Path-Based Partitioning Methods for 3D Networks-on-Chip with Minimal Adaptive Routing," IEEE Transactions on Computers, vol. 63, no. 3, pp. 718-733, 2014. [DOI:10.1109/TC.2012.255]
24. [24] S. G. Nambiar, K. Swaminathan, G. Lakshmin-arayanan, S. Ko, "QaMC - QoS Aware Multicast router for NoC fabric," IEEE 27th Canadian Conference on Electrical and Computer Engineering (CCECE), pp. 1-6, 2014. [DOI:10.1109/CCECE.2014.6901089]
25. [25] W. Hu, Z. Lu, A. Jantsch, H. Liu, "Power-Efficient Tree Based Multicast Support for Networks-on-Chip," 16th Asia and Pacific Design Automation Conference (ASP-DAC), pp. 363-368, 2011. [DOI:10.1109/ASPDAC.2011.5722214]
26. [26] F. Nasiri, H. Sarbazi-Azad, A. Khademzadeh, "Reconfigurable Multicast Routing for Networks on Chip," Microprocessors and Microsystems, vol. 42, pp. 180-189, 2016. [DOI:10.1016/j.micpro.2016.02.009]
27. [27] M.R. Arun, P.A. Jisha, J. Jose, "A Novel Energy Efficient Multicasting Approach for Mesh NoCs," Procedia Computer Science, vol. 93, pp. 283-291, 2016. [DOI:10.1016/j.procs.2016.07.212]
28. [28] M.R. Arun, P. A. Jisha, "SMDP-single Message Duplicate in Partition, a Multicast Routing Method in Mesh 2D NoC," 3rd International Conference on Innovations in Information Embedded and Communication Systems, pp. 676-680, 2016.
29. [29] W. Xiaohang, M. Palesi, J. Yingtao, M.C. Huang, L. Peng, "Low Latency and Energy Efficient Multicasting Schemes for 3D NoC-based SoCs," IEEE/IFIP International Conference of VLSI and System-on-Chip (VLSI-SoC), pp. 337-342, 2011. [DOI:10.1109/VLSISoC.2011.6081604]
30. [30] Z. Liu, N. Wu, L. Zhou, G. Yan, "A Path Optimized Multicast Routing Algorithm for 3D Network-on-Chip," The World Congress on Engineering and Computer Science (WCECS), 2015.
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